Altera quartus ii 13.1 programmer serial#
Altera quartus ii 13.1 programmer manual#
Altera quartus ii 13.1 programmer software#
Altera quartus ii 13.1 programmer code#

I can successfully configure the FPGA from the EPCQ device (no NIOS processor). Let me know and I will see if I can help. Is this custom hardware or a development kit? What method are you using to program the EPCQ device? So, I presume the only method you have of programming the FPGA is via JTAG. This implies the FPGA's isn't booting at all. Can it? Forget Nios, just a simple rtl only project that, for example, flashes an LED. You don't specifically say whether your hardware can successfully boot the FPGA from the EPCQ device. However, after a power cycle, all pins are in tri-state and neither the FPGA nor the Nios processor will configure. After running nios2-flash-programmer, the processor enters reset and the LEDs blink. I have another blinking LED running in main() in my Nios C code. nios2-flash-programmer -epcs -base=0x00 sw.flash flash file even if it had been programmed with quartus programmer earlier in. programmed the device using the Nios II flash programmer using nios2-flash-programmer -epcs -base=0x00 hw.flash (the epcq needs to be programmed with the. Used nios2-configure-sof (command line programmer) to configure FPGA with hw.sofДЎ4.

Altera quartus ii 13.1 programmer software#

Generated flash file for software with elf2flash -input=sw.elf -output=sw.flash -epcs -after=hw.flash -verbose (this is supposed to be 'epcs' even though the chip is 'epcq')ДЎ3. Generated flash files for hardware with sof2flash -input=hw.sof -output=hw.flash -epcq -verboseДЎ2. Power cycled - I have an LED turn on when the FPGA configures, and this LED turned onДЎ1. Successfully programmed and verified EPCQДЎ0.

Altera quartus ii 13.1 programmer serial#

Converted programming file from sof to jic, specified active serial x4, added the correct p/n for the flash loader, and turned on compression (as requested by solution document)Д©. Pointed the exception vector to on-chip-memoryД§. Pointed the reset vector of NIOS to an EPCS/EPCQ controller (connected in Qsys, with a locked base address of 0x00)Д¤. Deleted db and incremental db in project directoryДЈ. Added lines STRATIXV_CONFIGURATION_SCHEME 'ACTIVE SERIAL X1' and ENABLE_INIT_DONE_OUTPUT ON to project qsfДў. when I do not want a JTAG cable connected to hardware). According to Altera, steps 6-15 would be required *each* time I make a change to either hardware OR software and I want to program to non-volatile memory (i.e. I have taken the following steps (in order). I've followed the following guideleins to boot from EPCQ or EPCS (from Altera rd11192013_118):

Altera quartus ii 13.1 programmer code#

I suspect the Parallax Forums will get this resolved much faster.I'm having trouble with NIOS II code executing from an EPCQ x4 flash chip (p/n Micron N25Q256A) after a power cycle.

The latest thread is asking support questions about V14.0. It seems a very sleepy backwater with nobody even considering Quartus II V15.0.2 yet. Visiting the Altera Forums is not going to help. And then see if the same issues are resolved in the same way in Debian 8.1. I certainly would rather not roll back to Debian 7.6, but I may use my USB harddisk version to get started with a good install.

Altera quartus ii 13.1 programmer manual#

There is an 'Altera Installation and License Manual that mentions the path problem in Linux in section 4-6, but the text is no very concise about details.ДЄlso, I was getting warnings to reconfigure Locales and I thought that was a legacy problem that carried over from Wheezy.ДЄnd now I see that I may have to also do something about USB-Blaster. I will read and explore those in the next few days. The path issues have yet to be addressed. Quartus II should have online documentation and other stuff when properly working, but that appears broken in my case. The DBus is apparently used to reach the outside world for download and document servers.